Virtually all digitization systems interacting with the analog world are faced with the challenge of acquiring an external input signal with a circuit that minimizes noise and distortion. In fact, once the signal under observation in the external world has been corrupted by either adding noise onto it or generating spurious harmonics, its quality cannot be recovered afterwards, unless other parametric information about the input were already known; and the signal recovery method will add its own non-idealities and design burden on the whole data acquisition (DAQ) chain. This is true, for example, in the case of sampling circuits, which survey the input at discrete times (usually dictated by synchronous clock circuitry) and retain the values as observed in between adjacent samples. In this case, if the sampling apparatus is implemented, e.g., by way of a switched-capacitor circuit, the noise added by the sampler itself assumes the well-known form of kT/C wideband RMS noise; while the resistive and capacitive non-linearities of the switch introduce harmonic distortion, usually as 2nd and 3rd harmonic tones, to the input signal. Obviously one technique to reduce both kT/C and distortion is to increase the size of the capacitor used in the sampling process, since that automatically reduces the bandwidth of the noise and diminishes the impact of any charge injection term generated by the switch. However, this simple design choice often conflicts with the speed and especially with the area requirements of an integrated solution, in particular when the sampling circuit is employed at the front-end of a multi-channel system such as the ones found in imaging and/or bio-medical machines, which can range from 2 to 256 or more channels, activated simultaneously or in a time-staggered fashion.
FIG. 1 represents prior art of a sampling channel 100 for the acquisition of the charge signal provided by a photo-diode, which is in turn proportional to the intensity of the light (visible, or UV, or infra-red, or of another region of the electromagnetic spectrum such as X-ray radiation) sensed on a target such as a scintillator or a Photo-Multiplying Tube (PMT). The charge from the photodiode 102 is sampled by a switched-capacitor Sample/Hold (S/H) circuit including switches 104 and 106, capacitor Cs, and operational amplifier 108 configured as a buffer amplifier. The photodiode 102 may have some levels of multiplexing between the sensor and the reading electronics. Besides the issue of area, the aforementioned prior art suffers from a different potential problem: the capacitance non-linearity vs. voltage, often quantified by voltage coefficients VC1 [ppm/V] and VC2 [ppm/V2], respectively for linear and quadratic dependence of the capacitance Cs on the input signal (charge q(t)). Notice that, while the coefficients have been minimized by many silicon foundries for certain types of capacitors, and they approach a few 10 ppm/V or 10 ppm/V2 for low-density capacitor implementations, they can easily exceed 1000's of ppm/V or ppm/V2 for the capacitor structures offering the highest densities, such as M-O-S varactor implementations. The low-noise requirement is therefore at odds with the low-distortion performance, and a low-area solution using a dense capacitor (>5 fF/μm2) would provide low kT/C noise at the expense of significant distortion, as compared to the best dielectric solutions that use capacitor densities around 1 fF/μm2 with the current state of the art. It would therefore be desirable to design a circuit able to minimize all three figures of merit for a S/H apparatus: noise, distortion, and area.